dsPIC30F Sensor Family 16-bit Digital Signal Controller Seamless migration options from this device to dsPIC33F, PIC24H or PIC24F devices in similar packages.
Features
High-Performance Modified RISC CPU:
Modified Harvard architecture
C compiler optimized instruction set architecture
84 base instructions with flexible addressing modes
24-bit wide instructions, 16-bit wide data path
16 x 16-bit working register array
Up to 30 MIPs operation: - DC to 40 MHz external clock input - Internal FRC input with PLL active (4x, 8x, 16x) - 4 MHz-10 MHz oscillator input with PLL active (4x, 8x, 16x) - 10 MHz - 20 MHz oscillator input in HS/2 or HS/3 with PLL active (4x, 8x, 16x)
Peripheral and External interrupt sources
8 user selectable priority levels for each interrupt
4 processor exceptions and software traps
Primary and Alternate interrupt Vector Tables DSP Engine Features:
Modulo and Bit-Reversed Addressing modes
Two, 40-bit wide accumulators with optional saturation logic
17-bit x 17-bit single cycle hardware fractional/ integer multiplier
Single cycle Multiply-Accumulate (MAC) operation
40-stage Barrel Shifter
Dual data fetch Peripheral Features:
High current sink/source I/O pins: 25 mA/25 mA
Optionally pair up 16-bit timers into 32-bit timer modules
3-wire SPI™ modules (supports 4 Frame modes)
I2C™ module supports Multi-Master/Slave mode and 7-bit/10-bit addressing
Addressable UART modules with FIFO buffers and selectable pins Analog Features:
12-bit 200 Ksps Analog-to-Digital Converter (A/D)
A/D Conversion available during Sleep and Idle
1 Sample/Hold
Multiple Conversion Sequencing Options Special Microcontroller Features:
Enhanced Flash program memory: - 10,000 erase/write cycle (min.) for industrial temperature range, 100K (typical)
Data EEPROM memory: - 100,000 erase/write cycle (min.) for industrial temperature range, 1M (typical)
