MIPS Technologies´ System Navigator™ probes support all of the latest MIPS® cores and licensee processors in the MIPS32® family, from the 4K® and 4KE® cores to the 1004K™ coherent processing system. System Navigator probes are designed to support the special features and integrated peripherals of the MIPS family of synthesizable cores. They leverage MIPS EJTAG debug features and also supports advanced PDtrace™ features, if implemented in the processor. The System Navigator probe connects to the target system using a standard 14-pin EJTAG debug connector.

Extensive debugger support including Eclipse-based MIPS Navigator™ ICS on Windows® and Linux

Software development tools used with the System Navigator probes include the CodeSourcery SG++ GNU-based toolchain for MIPS and the new MIPS Navigator™ Integrated Component Suite (ICS). All probe features are available from the Navigator ICS interface, which has an Eclipse-standard interface and C/C++ Development Tool (CDT) components, with special plug-ins for processor debugging using the probe.

The System Navigator probes are also supported by the Viosoft embedded Linux Arriba debugger. Now you can use the System Navigator probe with the best-in-class software tools for an intuitive, easy to use interface. The system runs on a PC with Windows NT/2000/XP or Linux and requires a USB 2.0 or 10/100 Ethernet connection. For designs requiring off-chip trace capture, the System Navigator Pro is available.

Key Features

• One tool supports all MIPS32 and MIPS64® processors, including the 4K, 24K®, 34K®, 74K™ and 1004K families
• Supports multiple source-level debuggers including the CodeSourcery SG++ toolchain, MIPS Navigator ICS, GDB
• Viosoft Arriba debugger available for Embedded Linux debugging
• Supports PDtrace in on-chip trace capture mode
• Real-time PC execution trace, load/store address, and data trace
• Trace can be gated on/off by on-chip triggers
• Scalable internal trace depth or external trace port width and speed
• Unlimited software breakpoints via SDBBP instruction
• Single-step by assembly or C source line
• Read-write all CPU registers
• Read-write memory whether CPU is stopped or running
• MIPS standard hardware breakpoints
• Flash programming support
• Multi-core debug with multiple MIPS cores
• Mixed core debug with MIPS and other cores supported (option)
• Go, halt processor run control
• Low-level access to JTAG functions for silicon verification
• Single line assembler and disassembler
• Command-line interface with Tcl/tk scripting
• Binary software interface adheres to MDI specification

Brief